Semiconductor devices such as transistors or diodes formed by using a silicon carbide substrate (SiC substrate) where Si and C are bonded at a component ratio of 1:1 are expected to be put to practical use as power devices. Since silicon carbide is a wide band gap semiconductor and a breakdown electric field thereof is an order of magnitude higher than that of silicon, a high reverse breakdown voltage can be maintained even if the thickness of a depletion layer in a pn junction or a Schottky junction is reduced. Thus, the use of the silicon carbide substrate allows the thickness of the device to be reduced and a doping concentration to be increased. Therefore, it is expected that a low-loss power device having low on-resistance and high breakdown voltage will be realized. A substrate having a 4H or 6H polytype is generally used as the silicon carbide substrate, and in order to achieve smooth epitaxial growth, a substrate having a main surface offset at approximately 8° with respect to a {0001} surface is used.
Vertical MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) where a current is vertically flown in order that a surface of a silicon carbide layer may be effectively used are the mainstream in MOSFETs formed by using a silicon carbide substrate. One of the vertical MOSFETs that are known is a so-called UMOSFET (that is also referred to as a trench-type MOSFET) having a trench formed in a part of a silicon carbide layer and a gate electrode formed in the trench. This is a transistor where a channel region is provided vertically. Examples of the UMOSFET are disclosed, for example, in Japanese Patent Laying-Open No. 10-125904 (Patent Document 1), Japanese Patent Laying-Open No. 2005-56868 (Patent Document 2) and Japanese Patent Laying-Open No. 2005-340685 (Patent Document 3).    Patent Document 1: Japanese Patent Laying-Open No. 10-125904    Patent Document 2: Japanese Patent Laying-Open No. 2005-56868    Patent Document 3: Japanese Patent Laying-Open No. 2005-340685